TN-41-02: DDR3 ZQ Calibration
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چکیده
Introduction For more robust system operation, the DDR3 SDRAM driver design has been enhanced with reduced capacitance, dynamic on-die termination (ODT), and a new calibration scheme. The capacitance reduction comes from the use of a new “merged” driver. With the new driver, circuitry that makes up the output driver is shared for use in ODT. Separate structures were used on DDR2 for the output driver and termination impedances. Figure 1: Merged Driver
منابع مشابه
TN-41-13: DDR3 Point-to-Point Design Support
• TN-00-20: Understanding the Value of Signal Integrity Testing • TN-41-02: DDR3 ZQ Calibration • TN-41-04: Dynamic On-Die Termination • TN-46-02: Decoupling Capacitor Calculation for a DDR Memory Channel • TN-46-06: Termination for Point-to-Point Systems • TN-46-11: DDR SDRAM Point-to-Point Simulation Process • TN-46-14: Hardware Tips for Point-to-Point System Design: Termination, Layout, and ...
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